SiFive Creates Non-Open-Source RISC-V Implementations

RISC-V battles to get messaging right over open standard

SiFive, an engineering house specializing in RISC-V CPU designs, has developed non-open-source implementations of the RISC-V ISA in CPU cores for various chips, highlighting the distinction between open source and open specification.

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SiFive Executive Argues Against RISC-V Sanctions

Why RISC-V must get its messaging right on open standard vs open source

SiFive senior vice president Jack Kang has argued that sanctioning RISC-V would be impractical and difficult to enforce due to its open standard nature and widespread use, emphasizing the need for clear messaging around open source and open specification.

SiFive's RISC-V CPU designs under scrutiny amid US-China tech tensions

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SiFive, a company specializing in RISC-V CPU designs, is caught in the middle of the US-China tech rivalry. While SiFive has created non-open-source implementations of the RISC-V ISA, RISC-V International is working to clarify the distinction between open source and open specification to avoid a crackdown. US lawmakers have expressed concerns that RISC-V could be a gateway for China to access US technology.

SiFive is a leading provider of RISC-V based chip cores, empowering companies to accelerate the design cycle, reduce risk and cost, and innovate faster in the semiconductor industry. With a focus on open standard RISC-V architecture, SiFive drives the global ecosystem and delivers superior performance, power efficiency, and innovation.

The heart of SiFive is RISC-V! SiFive creates the building blocks of RISC-V-based IP that are the inevitable innovative reimagining of every computing platform. 

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Interested in learning more about ML compilers for #RISCV vectors? SiFive Senior Staff Engineer Hong-Rong Hsu shares how RVV can accelerate operators during fallback and provide them with greater optimization potential: https://hubs.la/Q02mggXg0 #NoLimits

Headed to embedded world in April? We’ll be at the #RISCV booth and are looking forward to showcasing how SiFive brings the limitless potential of RISC-V to the most powerful and data-intensive applications in the world. Get a sneak peek of what awaits you at #ew24 here: https://hubs.la/Q02l_6zD0

Congratulations to Monia Chiavacci, a senior principal architect at SiFive, for being named a finalist for Innovator of the Year! This nomination from the Women Leaders in Electronics Awards by Electronics Weekly recognizes Monia’s pivotal role in developing key technologies for SiFive’s automotive portfolio. One example is how Monia established a Road Vehicle Functional Safety (FuSa) methodology for RISC-V IP. #WLIEA #RISCV #NoLimits

GOMACTech 2024 is just around the corner! Register now and stop by booth #809 at the show to learn more about SiFive’s unrivaled compute platforms that are enabling technology companies around the world: https://hubs.la/Q02l_5L70 #RISCV #NoLimits

According to a new report from ABI Research, #RISCV chip shipments in edge AI (excluding TinyML) are expected to grow to 129 million by 2030. Learn more about RISC-V’s penetration into AI workloads here: https://hubs.la/Q02lKyKn0 #NoLimits

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